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Silicon Labs /SiM3_NRND /SIM3U167_B /PMU_0 /CONFIG

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Interpret as CONFIG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)RTC0FREN 0 (DISABLED)RTC0AREN 0 (DISABLED)CMP0REN 0 (DISABLED)PWAKEREN 0 (DISABLED)LPT0REN

LPT0REN=DISABLED, CMP0REN=DISABLED, RTC0AREN=DISABLED, PWAKEREN=DISABLED, RTC0FREN=DISABLED

Description

Module Configuration

Fields

RTC0FREN

RTC0 Fail RTC0/LPTIMER0 Reset Enable.

0 (DISABLED): An RTC0 fail event does not cause the RTC0 and LPTIMER0 modules to reset.

1 (ENABLED): An RTC0 fail event causes the RTC0 and LPTIMER0 modules to reset.
RTC0AREN

RTC0 Alarm RTC0/LPTIMER0 Reset Enable.

0 (DISABLED): An RTC0 alarm event does not cause the RTC0 and LPTIMER0 modules to reset.

1 (ENABLED): An RTC0 alarm event causes the RTC0 and LPTIMER0 modules to reset.
CMP0REN

Comparator 0 RTC0/LPTIMER0 Reset Enable.

0 (DISABLED): A Comparator 0 event does not cause the RTC0 and LPTIMER0 modules to reset.

1 (ENABLED): A Comparator 0 event causes the RTC0 and LPTIMER0 modules to reset.
PWAKEREN

Pin Wake RTC0/LPTIMER0 Reset Enable.

0 (DISABLED): A Pin Wake event does not cause the RTC0 and LPTIMER0 modules to reset.

1 (ENABLED): A Pin Wake event causes the RTC0 and LPTIMER0 modules to reset.
LPT0REN

Low Power Timer RTC0/LPTIMER0 Reset Enable.

0 (DISABLED): An LPTIMER0 event does not cause the RTC0 and LPTIMER0 modules to reset.

1 (ENABLED): An LPTIMER0 event causes the RTC0 and LPTIMER0 modules to reset.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data